1. Field of the Invention
The present invention generally relates to an optical disc drive. More particularly, the present invention relates to the technique of controlling the frequency of a wobble PLL circuit in reading and/or writing information from/on an optical disc with a wobbled track groove and also relates to the technique of switching the characteristics of a bandpass filter for use to detect a wobble signal.
2. Description of the Related Art
FIG. 1A schematically illustrates the overall configuration of an optical disc 101 such as a DVD-RAM. FIG. 1B schematically illustrates a sector arrangement in a zone on the optical disc 101.
As shown in FIG. 1A, the information recording area of the optical disc 101 is divided into a plurality of zones 1102, 1103, etc., each including a plurality of tracks. The optical disc 101 is designed such that the innermost track of one of these zones has the same recording linear density as that of any other zone. That is to say, the recording linear density of the innermost track is constant all over the optical disc 101. Inside of each of these zones, however, the recording linear density decreases outward from the highest density of the innermost track to the lowest density of the outermost track.
Each of these zones 1104 is divided into multiple sectors 1105, 1106, etc., as shown in FIG. 1B. Although not shown specifically in FIG. 1B, each of these sectors includes an address section at the beginning thereof and a data section that follows the address section.
FIG. 2 is a plan view illustrating a detailed arrangement of tracks on the optical disc 101. On the optical disc 101 shown in FIG. 2, land tracks 1201 and groove tracks 1202 are alternately arranged in the radial direction. Each of these tracks 1201 and 1202 includes multiple data sections 1203 or 1204 and multiple address sections 1205 or 1206. The data sections 1203 or 1204 are arranged in the tracking direction at regular intervals, and the address sections 1205 or 1206 are also arranged in the tracking direction at regular intervals. As shown in FIG. 2, each of these address sections 1205 and 1206 is shifted in the disc radial direction by a half track pitch from the center of its associated track such that the address can always be read no matter whether the light beam spot follows the land tracks 1201 or the groove tracks 1202.
In each of these data sections 1203 and 1204, the track 1207 has a wobbled shape to represent clock synchronization marks. One wobbling period is normally several hundred times as long as one period of a data read clock signal.
When a light beam is focused onto the surface of an optical disc, a light beam spot is formed on a track of the disc. While the light beam spot is following the track, the light beam is also reflected from the optical disc. A wobble signal is detected from this reflected light. The wobble signal changes in a period corresponding to that of the wobbled shape of the tracks. Accordingly, a phase-locked loop (PLL) can be controlled by reference to the period of the wobble signal.
FIG. 3 shows a configuration for an optical disc drive that can read and/or write data from/on the optical disc 101.
In the optical disc drive shown in FIG. 3, a light beam is emitted from a head unit 102 so as to be focused onto the optical disc 101. The light beam is reflected from the optical disc 101 and then detected by a photodetector 103 that is provided for the head unit 102. In response, the photodetector 103 converts the received reflected light into an electric signal representing the intensity of the light and outputs it.
In reading and/or writing data from/on the optical disc 101, the optical disc drive operates in such a manner that the focal point of the light beam (i.e., the light beam spot) can follow the center of the tracks on the recording side of the rotating optical disc 101. More specifically, the head unit 102 moves to an appropriate location under the optical disc 101 such that the light beam spot is formed right on the desired track on the disc 101. Meanwhile, the position of the convergent lens (not shown) provided for the head unit 102 is finely adjusted by an actuator (not shown).
To read out data from the optical disc 101, the two output signals of the photodetector 103 shown in FIG. 3 are input to a subtractor 105, thereby detecting a signal from the address section of the track based on the output signal of the subtractor 105. More specifically, the photodetector 103 includes two divided photodiodes a and b, which are arranged in the tangential direction of the track. In this photodetector 103, the light beam that has been received by each of these two photodiodes is converted into an electric signal to be output. The output signal of the subtractor 105 represents the difference between the outputs of the two photodiodes, and includes information about the wobbled shape of the track that is followed by the light beam spot and information about the address section thereof.
FIG. 4A is a plan view schematically illustrating the wobbled shape of the track, while FIG. 4B shows the waveform of the differential signal to be output from the subtractor 105.
In the optical disc drive shown in FIG. 3, an address section detector 106 detects the address section of the track, on which the light beam spot is now located, based on the differential signal shown in FIG. 4B.
Next, the configuration and operation of the address section detector 106 will be described with reference to FIG. 5. FIG. 5 is a block diagram showing the internal configuration of the address section detector 106. As shown in FIG. 5, the output signal of the subtractor 105 (i.e., the differential signal) is supplied to a low-pass filter (LPF) 1401. The LPF 1401 filters out signal components of which the frequencies exceed an RF band in the range of about 1.2 MHz to about 4.5 MHz, for example. The output signal of the LPF 1401 has the waveform shown in FIG. 4C. Although not shown in FIG. 4B, even if such radio frequency (RF) components were included in the differential signal, those RF components would be filtered out by the LPF 1401.
Thereafter, the output signal of the LPF 1401 is compared to two reference levels, thereby detecting the information included in the address section. More specifically, the comparator 1402 shown in FIG. 5 determines whether or not the output of the LPF 1401 is at least equal to address detection level No. 1, while the comparator 1403 shown in FIG. 5 determines whether or not the output of the LPF 1401 is at least equal to address detection level No. 2. As indicated by the dashed lines in FIG. 4C, these address detection levels Nos. 1 and 2 are defined in advance such that the signal read out from the address section is distinguishable from the wobble signal.
As shown in FIG. 5, an exclusive OR gate 1404 obtains the logical sum of the output signals of the two comparators 1402 and 1403, thereby outputting the address detection signal shown in FIG. 4D.
Referring back to FIG. 3, a gate signal generator 113 receives the output signal of the address section detector 106 and then outputs a gate signal to a selector 110 and a data PLL circuit 112. In response to the gate signal, the selector 110 passes the output signal of another selector 109 (i.e., an address read signal) to an equalizer 111. The equalizer 111 has the functions of amplifying the signal components of an input signal in a specified frequency band, filtering out the signal components in the other band and digitizing the input signal, thereby outputting a read RF signal. The read RF signal is input to the data PLL circuit 112, which outputs a data read clock signal synchronously with the read RF signal. The data read clock signal is used as a reference signal in reading out data.
FIG. 6 shows the internal configuration of the data PLL circuit 112. A period measurer 1707 measures the length of one period of the wobble signal and outputs the obtained value to an amplifier 1709. In response, the amplifier 1709 amplifies the value and then outputs it to a comparator 1710. A frequency divider 1705 divides the frequency of the data read clock signal and outputs the resultant signal to another period measurer 1708, which measures the length of one period of that signal. Thus, the comparator 1710 compares the period that has been obtained by the period measurer 1707 to the period that has been obtained by the period measurer 1708. Based on the result of the comparison, the comparator 1710 outputs a control signal to a variable-frequency oscillator (VFO) 1704 by way of a selector 1706 and a phase compensator 1703. The selector 1706 is turned by a system controller 1317 (see FIG. 3). The VFO 1704 controls its oscillation frequency such that the ratio of one period of the data read clock signal to that of the wobble signal equals a predetermined ratio.
In reading an address, or data on the other hand, the system controller 1317 turns the selector 1706 such that the output signal of a phase comparator 1701 is supplied to the VFO 1704 by way of a switch 1702, the selector 1706 and the phase compensator 1703. The phase comparator 1701 compares the phase of the data read clock signal, of which the frequency has been divided by the frequency divider 1705, to that of the read RF signal. In this case, the VFO 1704 controls its oscillation frequency such that the data read clock signal is synchronized with the read RF signal.
Also, an address section gate signal, representing the address section of a sector to read data from, and a data section gate signal, representing the data section of the sector, are input to an exclusive OR gate 1711, which obtains the logical sum of these two gate signals and outputs it to the switch 1702. In this manner, the data PLL circuit 112 performs the phase comparison operation only on the address and data sections of the sector to read the data from.
Referring back to FIG. 3, an address reader 116 reads an address based on the data read clock signal and the read RF signal responsive to the output signal of the gate signal generator 113.
In response to a control signal supplied from the system controller 1317, the selector 109 selects either the output signal of the subtractor 105 or the output signal of an adder 104 to read out the address. The selector 109 makes this decision according to the specific type of the optical disc to read.
Referring to FIG. 7, shown is the internal configuration of the wobble detector 1307. Based on the output signal of the subtractor 105, the bandpass filter of this wobble detector 1307 extracts the wobble signal 1207 from the data section 1203 or 1204 of the track shown in FIG. 2, thereby generating a wobble detection signal. The wobble detection signal may have a waveform such as that shown in FIG. 4E, for example. In the wobble detector 1307, the comparator digitizes the wobble detection signal that has been extracted by the bandpass filter, thereby outputting a wobble signal. The wobble signal may have a waveform such as that shown in FIG. 4F.
In the optical disc drive shown in FIG. 3, a wobble PLL circuit 1308 performs a PLL control in response to the wobble signal. FIG. 8, the internal configuration of the wobble PLL circuit 1308. In FIG. 8, the period measurers 207 and 208, amplifier 209 and comparator 210 together make up a frequency control section.
The period measurer 207 finds the length of one period of the wobble signal and outputs the obtained value to the amplifier 209. In response, the amplifier 209 amplifies the obtained value and then outputs it to the comparator 210. A frequency divider 205 divides the frequency of the wobble clock signal and outputs the resultant signal to another period measurer 208, which finds the length of one period of that signal. Thus, the comparator 210 compares the period that has been obtained by the period measurer 207 to the period that has been obtained by the period measurer 208. Based on the result of the comparison, the comparator 210 outputs a control signal to a variable-frequency oscillator (VFO) 204 by way of a selector 1806 and a phase compensator 203. The selector 1806 is turned by the system controller 1317. The VFO 204, which is exemplary clock generating means, controls its oscillation frequency such that the ratio of one period of the wobble clock signal to that of the wobble signal substantially equals a predetermined ratio.
When this ratio becomes substantially constant, the system controller 1317 turns the selector 1806 such that the output signal of a phase comparator 201 is supplied to the VFO 204 by way of a switch 202, the selector 1806 and the phase compensator 203. The phase comparator 201, which is exemplary phase locking controller, compares the phase of the wobble clock signal, of which the frequency has been divided by the frequency divider 205, to that of the wobble signal. In this case, the VFO 204 controls its oscillation frequency such that the wobble clock signal is synchronized with the wobble signal. The wobble signal can be read only from the data section. Accordingly, the wobble PLL circuit 1308 is designed so as to suspend the phase comparing operation of the phase comparator 201 by turning the switch 202 OFF as soon as the address section detector 106 detects the address section while the wobble PLL circuit 1308 is performing the PLL control to synchronize the wobble clock signal with the wobble signal.
In accordance with the instruction of the system controller 1317, the gate signal generator 113 outputs an address section gate signal, representing the address section, to the selector 110. More specifically, the system controller 1317 instructs the gate signal generator 113 to generate the address section gate signal based on the wobble clock signal if the address reader 116 could read the address successfully but to generate the address section gate signal based on the output signal of the address section detector 106 if the address reader 116 failed to read the address. Also, in reading or writing data from/on the data section, the system controller 1317 instructs the gate signal generator 113 to output a data section gate signal representing the data section.
Furthermore, in writing data on the data section, a writing controller 118 passes write data, which is supplied from the system controller 1317, to the head unit 102 responsive to the data section gate signal and synchronously with the wobble clock signal, thereby writing the data on the optical disc 101.
Such an optical disc drive is disclosed in Japanese Laid-Open Publications No. 05-225580 and No. 2000-100083, for example.
The conventional optical disc drive described above, however, has the following drawbacks. Specifically, while the conventional optical disc drive is not performing a tracking control operation (e.g., during a seek operation to be performed by moving the head unit 102), no wobble signal can be detected from the electric signal being output from the photodetector 103 (i.e., the read signal). Accordingly, during such a period, the conventional optical disc drive cannot perform the wobble PLL control appropriately and may generate a clock signal with a frequency that is significantly different from the originally intended frequency.
Also, the conventional optical disc drive activates the wobble PLL circuit by a wobble signal to be detected after completing the seek operation. Thus, it takes a rather long time for the wobble PLL circuit to lock the VFO to the desired frequency. That is to say, in the conventional optical disc drive, a significant delay is inevitable after the seek operation ended and before the wobble PLL circuit starts to operate normally.
Hereinafter, this problem will be described in further detail with reference to FIG. 9.
FIG. 9 shows the waveform of a tracking error signal, the rotational speed of a disc motor, and the frequency of a wobble clock signal in a situation where an optical disc drive, which has been performing a tracking control operation, once suspends the tracking control operation to carry out a seek operation for a while, and then resumes the tracking control operation.
While an optical disc drive is performing a zoned constant linear velocity (ZCLV) operation, the best disc motor speed and the best wobble clock frequency change with on which track on the optical disc the light beam spot is currently located. In FIG. 9, the best disc motor speed corresponding to the location of the light beam spot before the seek operation is started is identified by N1, while the best disc motor speed corresponding to the location of the light beam spot when the seek operation is finished (i.e., on the target track) is identified by N2. FIG. 9 shows an example in which the light beam spot is displaced outward (i.e., from an inner track position to an outer track position on the disc) as a result of the seek operation.
The conventional optical disc drive discontinues the tracking control operation before starting the seek operation and performs no tracking control operation during the seek operation. Accordingly, during the seek operation, the conventional optical disc drive can detect no wobble signal and the frequency of the wobble clock signal is disturbed as shown in FIG. 9.
On finishing the seek operation at a time t1, the optical disc drive resumes the tracking control operation. Thus, the wobble clock frequency, which has been disturbed during the seek operation, starts to recover at the time t1 to reach the appropriate level at a time t2.
In FIG. 9, the dashed curve 1901 represents the best wobble clock frequency associated with a track that has just been reached as a result of the seek operation (i.e., the target track). Such a wobble clock frequency changes with the rotational speed of the disc motor. During the seek operation, the disc motor speed changes as shown in FIG. 9. Accordingly, the dashed curve 1901 represents how the wobble clock frequency should change with the disc motor speed on the target track.
At the time t1, the seek operation is finished, the light beam spot reaches the target track, and the tracking control operation starts all over again. However, at this point in time t1, the disc motor speed is still higher than the predetermined speed N2 as shown in FIG. 9. The point in time at which the disc motor speed reaches the predetermined speed N2 shifts with the specific response speed of the motor. Accordingly, even if the wobble clock frequency starts being adjusted as soon as the tracking control operation is restarted, the actual wobble clock frequency matches the ideal one (as indicated by the dashed curve 1901) at no earlier than the time t2. This is because it takes an amount of time of t2–t1 for the wobble PLL circuit to lock the VFO to the desired frequency. For that reason, even if the optical disc drive can perform the seek operation quickly, it still takes a rather long time for the optical disc drive to obtain an appropriate wobble clock signal.
Furthermore, in the conventional optical disc drive, the bandpass filter for use to detect the wobble signal has a fixed frequency characteristic. Accordingly, even if such an optical disc drive tries to perform a read operation at a different rate or a constant angular velocity (CAV) operation, the optical disc drive could miss the wobble signal because the frequency of the wobble signal obtained might be out of the pass band of the bandpass filter.